TXFIFO_TIMEOUT | This register stores the timeout value.when DMA takes more time than this register value to receive a data it will produce uhci_tx_hung_int interrupt. |
TXFIFO_TIMEOUT_SHIFT | The tick count is cleared when its value >=(17’d8000>>reg_txfifo_timeout_shift) |
TXFIFO_TIMEOUT_ENA | The enable bit for txfifo receive data timeout |
RXFIFO_TIMEOUT | This register stores the timeout value.when DMA takes more time than this register value to read a data from RAM it will produce uhci_rx_hung_int interrupt. |
RXFIFO_TIMEOUT_SHIFT | The tick count is cleared when its value >=(17’d8000>>reg_rxfifo_timeout_shift) |
RXFIFO_TIMEOUT_ENA | This is the enable bit for DMA send data timeout |